By M. Rafiquzzaman

Basics of electronic common sense and Microcomputer layout- Wiley India-M. Rafiquzzaman-2010-EDN-1

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Extra info for Fundamentals of Digital Logic and Microcomputer Design, 5th Ed

Sample text

The equations for the next states of the flip-flops can be written as X + = ( X +Y ) * A Y+=A+X Here X+ and Y+ represent the next states of the flip-flops after the clock pulse. The right side of each equation denotes the present states of the flip-flops (X,Y)and the input (A)that will produce the next state of each flip-flop. The Boolean expressions for the next state are obtained from the combinational circuit portion of the sequential circuit. 17 Present State Input Next State Flip Flop Inputs Output X Y A X+ Y+ Dx DY B 0 0 0 1 1 1 1 1 0 0 1 1 1 1 1 0 0 1 0 1 1 1 1 0 0 1 1 0 1 0 1 1 1 0 0 1 0 1 0 1 1 0 1 0 1 0 1 0 1 1 0 1 0 1 0 0 1 1 1 0 1 0 1 1 outputs of the combinational circuit are connected to the D inputs of the flip-flops.

Field programmable PLAs (FPLAs) on the other hand, can be programmed by the user with a computer-aided design (CAD) program to select a minimum number of product terms to express the Boolean functions. There are three types of commercially available Field Programmable Devices (FPDs). These are Simple PLD (SPLD), Complex PLD (CPLD), and Field Programmable Gate Array (FPGA). Among all SPLDs, PALs are widely used. SPLD uses EPROM technology to implement the switches. Note that PAL is a registered trademark of Advanced Micro Devices, Inc.

A test bench program allows the designer to monitor the output(s) based on application of appropriate inputs. These outputs can then be verified for correctness. Test results can be represented in terms of both waveform and tabular form. The waveform typically contains timing diagrams to graphically show the relationship between time, inputs, and outputs. Verilog and VHDL along with examples for synthesizing Combinational circuits and Sequential circuits are discussed in Appendix I and Appendix J respectively.